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module
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vm
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disassembler.scm
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Commit message (
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Author
Files
Lines
2015-12-03
Add support for comparing u64 values with SCM values
Andy Wingo
1
-1
/
+5
2015-12-01
Untag values and indexes for all bytevector instructions
Andy Wingo
1
-1
/
+1
2015-12-01
New instructions load-f64, load-u64
Andy Wingo
1
-1
/
+1
2015-12-01
Add instructions to branch on u64 comparisons
Andy Wingo
1
-1
/
+3
2015-11-12
Don't compile equal? to br-if-equal
Andy Wingo
1
-2
/
+2
2015-10-28
Remove use of return in disassembler.scm
Andy Wingo
1
-1
/
+1
2015-10-28
Always emit return-values
Andy Wingo
1
-0
/
+4
2015-10-22
Update VM documentation for new stack layout
Andy Wingo
1
-1
/
+7
2015-10-21
Add stack size computation to disassembler
Andy Wingo
1
-8
/
+70
2015-10-21
Prepare for SP-addressed locals
Andy Wingo
1
-40
/
+28
2015-01-22
Keywords have a tc7
Andy Wingo
1
-1
/
+2
2014-07-03
Compiler emits br-if-logtest
Andy Wingo
1
-1
/
+1
2014-07-03
Add br-if-logtest opcode
Andy Wingo
1
-1
/
+2
2014-04-20
VM opcodes only have <24-bit slot operands in the first word
Andy Wingo
1
-16
/
+0
2014-04-16
Add parsing interfaces to the disassembler
Andy Wingo
1
-1
/
+116
2014-04-13
Improve disassembly for optimized closures
Andy Wingo
1
-4
/
+19
2013-12-02
Rename "RTL" to "bytecode"
Andy Wingo
1
-2
/
+2
2013-11-30
Unknown files print as (unknown file) in disassembler
Andy Wingo
1
-1
/
+1
2013-11-30
,x disassembles nested programs too
Andy Wingo
1
-21
/
+38
2013-11-19
Rename objcodes?.{scm,c,h} to loader.{scm,c,h}
Andy Wingo
1
-1
/
+1
2013-11-19
(system vm instruction) rtl-instruction-list -> (language rtl) instruction-list
Andy Wingo
1
-1
/
+1
2013-11-19
rtl-program-code -> program-code
Andy Wingo
1
-3
/
+3
2013-11-19
rtl-program? -> program?
Andy Wingo
1
-1
/
+1
2013-11-08
Add fold-program-code to (system vm disassembler)
Andy Wingo
1
-0
/
+66
2013-11-03
RTL compiler supports static bitvectors
Andy Wingo
1
-0
/
+1
2013-10-31
Better compiler support for bytevector ops
Andy Wingo
1
-0
/
+1
2013-10-31
static-patch! replaces link-procedure!
Andy Wingo
1
-7
/
+0
2013-10-27
VM has "builtins": primitives addressable by emitted RTL code
Andy Wingo
1
-1
/
+3
2013-10-26
RTL compiler: Compile TC7 branches.
Andy Wingo
1
-1
/
+11
2013-10-14
RTL: Compile prompts
Andy Wingo
1
-1
/
+1
2013-10-04
Disassembling RTL prints source information.
Andy Wingo
1
-2
/
+20
2013-08-29
,xx for RTL images
Andy Wingo
1
-1
/
+7
2013-08-29
add ability to disassemble ELF images
Andy Wingo
1
-1
/
+24
2013-08-24
RA == MVRA in disassembler
Andy Wingo
1
-6
/
+1
2013-08-11
Various RTL VM and calling convention tweaks
Andy Wingo
1
-5
/
+12
2013-07-21
RTL instructions have no rest args
Andy Wingo
1
-19
/
+1
2013-07-21
RTL: Local 0 is the procedure
Andy Wingo
1
-4
/
+6
2013-07-21
rtl: propagate OP_DST to scheme
Andy Wingo
1
-1
/
+1
2013-06-09
Add RTL disassembler
Andy Wingo
1
-0
/
+350