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authorAndy Wingo <wingo@pobox.com>2019-04-03 13:59:33 +0200
committerAndy Wingo <wingo@pobox.com>2019-04-03 13:59:33 +0200
commit2e4fb1e665562bfd84a0d35c965ce0c29a0abc9d (patch)
tree1ef4036a23def6de8df188e477ca6e1bc19d055d /libguile/lightning/lightening/x86.h
parentd351f13bc2eedff7a35f3bd479390bd269f96bbd (diff)
parentf348b8ed6d44a90a199fca9debb43971b23d0017 (diff)
downloadguile-2e4fb1e665562bfd84a0d35c965ce0c29a0abc9d.tar.gz
Merge in changes from upstream lightening
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diff --git a/libguile/lightning/lightening/x86.h b/libguile/lightning/lightening/x86.h
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+/*
+ * Copyright (C) 2012-2019 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU lightning.
+ *
+ * GNU lightning is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU Lesser General Public License as published
+ * by the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU lightning is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
+ * License for more details.
+ *
+ * Authors:
+ * Paulo Cesar Pereira de Andrade
+ */
+
+#ifndef _jit_x86_h
+#define _jit_x86_h
+
+#define JIT_HASH_CONSTS 1
+#define JIT_NUM_OPERANDS 2
+
+/*
+ * Types
+ */
+#define jit_sse2_p() jit_cpu.sse2
+#define jit_x87_reg_p(reg) ((reg) >= _ST0 && (reg) <= _ST6)
+#if __WORDSIZE == 32
+# if defined(__x86_64__)
+# define __X64 1
+# define __X64_32 1
+# define __X32 0
+# else
+# define __X64 0
+# define __X64_32 0
+# define __X32 1
+# endif
+#else
+# define __X64 1
+# define __X64_32 0
+# define __X32 0
+#endif
+
+#define JIT_FP JIT_GPR(_RBP)
+typedef enum {
+#if __X32
+# define jit_r(i) (_RAX + (i))
+# define jit_r_num() 3
+# define jit_v(i) (_RBX + (i))
+# define jit_v_num() 3
+# define jit_f(i) (jit_cpu.sse2 ? _XMM0 + (i) : _ST0 + (i))
+# define jit_f_num() (jit_cpu.sse2 ? 8 : 6)
+# define JIT_R0 JIT_GPR(_RAX)
+# define JIT_R1 JIT_GPR(_RCX)
+# define JIT_R2 JIT_GPR(_RDX)
+ _RAX, _RCX, _RDX,
+# define JIT_V0 JIT_GPR(_RBX)
+# define JIT_V1 JIT_GPR(_RSI)
+# define JIT_V2 JIT_GPR(_RDI)
+ _RBX, _RSI, _RDI,
+ _RSP, _RBP,
+# define JIT_F0 JIT_FPR(_XMM0)
+# define JIT_F1 JIT_FPR(_XMM1)
+# define JIT_F2 JIT_FPR(_XMM2)
+# define JIT_F3 JIT_FPR(_XMM3)
+# define JIT_F4 JIT_FPR(_XMM4)
+# define JIT_F5 JIT_FPR(_XMM5)
+# define JIT_F6 JIT_FPR(_XMM6)
+ _XMM0, _XMM1, _XMM2, _XMM3, _XMM4, _XMM5, _XMM6, _XMM7,
+# define jit_sse_reg_p(reg) ((reg) >= _XMM0 && (reg) <= _XMM7)
+#else
+# if __CYGWIN__
+# define jit_r(i) (_RAX + (i))
+# define jit_r_num() 3
+# define jit_v(i) (_RBX + (i))
+# define jit_v_num() 7
+# define jit_f(index) (_XMM4 + (index))
+# define jit_f_num() 12
+# define JIT_R0 JIT_GPR(_RAX)
+# define JIT_R1 JIT_GPR(_R10)
+# define JIT_R2 JIT_GPR(_R11)
+# define JIT_V0 JIT_GPR(_RBX)
+# define JIT_V1 JIT_GPR(_RDI)
+# define JIT_V2 JIT_GPR(_RSI)
+# define JIT_V3 JIT_GPR(_R12)
+# define JIT_V4 JIT_GPR(_R13)
+# define JIT_V5 JIT_GPR(_R14)
+# define JIT_V6 JIT_GPR(_R15)
+ /* Volatile - Return value register */
+ _RAX,
+ /* Volatile */
+ _R10, _R11,
+ /* Nonvolatile */
+ _RBX, _RDI, _RSI,
+ _R12, _R13, _R14, _R15,
+ /* Volatile - Integer arguments (4 to 1) */
+ _R9, _R8, _RDX, _RCX,
+ /* Nonvolatile */
+ _RSP, _RBP,
+# define JIT_F0 JIT_FPR(_XMM0)
+# define JIT_F1 JIT_FPR(_XMM1)
+# define JIT_F2 JIT_FPR(_XMM2)
+# define JIT_F3 JIT_FPR(_XMM3)
+# define JIT_F4 JIT_FPR(_XMM4)
+# define JIT_F5 JIT_FPR(_XMM5)
+# define JIT_F6 JIT_FPR(_XMM6)
+# define JIT_F7 JIT_FPR(_XMM7)
+# define JIT_F8 JIT_FPR(_XMM8)
+# define JIT_F9 JIT_FPR(_XMM9)
+# define JIT_F10 JIT_FPR(_XMM10)
+# define JIT_F11 JIT_FPR(_XMM11)
+# define JIT_F12 JIT_FPR(_XMM12)
+# define JIT_F13 JIT_FPR(_XMM13)
+# define JIT_F14 JIT_FPR(_XMM14)
+# define JIT_F15 JIT_FPR(_XMM15)
+ /* Volatile */
+ _XMM4, _XMM5,
+ /* Nonvolatile */
+ _XMM6, _XMM7, _XMM8, _XMM9, _XMM10,
+ _XMM11, _XMM12, _XMM13, _XMM14, _XMM15,
+ /* Volatile - FP arguments (4 to 1) */
+ _XMM3, _XMM2, _XMM1, _XMM0,
+# define jit_sse_reg_p(reg) ((reg) >= _XMM4 && (reg) <= _XMM0)
+# else
+# define jit_r(i) (_RAX + (i))
+# define jit_r_num() 4
+# define jit_v(i) (_RBX + (i))
+# define jit_v_num() 4
+# define jit_f(index) (_XMM8 + (index))
+# define jit_f_num() 8
+# define JIT_R0 JIT_GPR(_RAX)
+# define JIT_R1 JIT_GPR(_R10)
+# define JIT_R2 JIT_GPR(_R11)
+# define JIT_R3 JIT_GPR(_R12)
+ _RAX, _R10, _R11, _R12,
+# define JIT_V0 JIT_GPR(_RBX)
+# define JIT_V1 JIT_GPR(_R13)
+# define JIT_V2 JIT_GPR(_R14)
+# define JIT_V3 JIT_GPR(_R15)
+ _RBX, _R13, _R14, _R15,
+ _R9, _R8, _RCX, _RDX, _RSI, _RDI,
+ _RSP, _RBP,
+# define JIT_F0 JIT_FPR(_XMM0)
+# define JIT_F1 JIT_FPR(_XMM1)
+# define JIT_F2 JIT_FPR(_XMM2)
+# define JIT_F3 JIT_FPR(_XMM3)
+# define JIT_F4 JIT_FPR(_XMM4)
+# define JIT_F5 JIT_FPR(_XMM5)
+# define JIT_F6 JIT_FPR(_XMM6)
+# define JIT_F7 JIT_FPR(_XMM7)
+# define JIT_F8 JIT_FPR(_XMM8)
+# define JIT_F9 JIT_FPR(_XMM9)
+# define JIT_F10 JIT_FPR(_XMM10)
+# define JIT_F11 JIT_FPR(_XMM11)
+# define JIT_F12 JIT_FPR(_XMM12)
+# define JIT_F13 JIT_FPR(_XMM13)
+# define JIT_F14 JIT_FPR(_XMM14)
+# define JIT_F15 JIT_FPR(_XMM15)
+ _XMM8, _XMM9, _XMM10, _XMM11, _XMM12, _XMM13, _XMM14, _XMM15,
+ _XMM7, _XMM6, _XMM5, _XMM4, _XMM3, _XMM2, _XMM1, _XMM0,
+# define jit_sse_reg_p(reg) ((reg) >= _XMM8 && (reg) <= _XMM0)
+# endif
+#endif
+# define JIT_NOREG _NOREG
+ _NOREG,
+} jit_reg_t;
+
+typedef struct {
+ /* x87 present */
+ uint32_t fpu : 1;
+ /* cmpxchg8b instruction */
+ uint32_t cmpxchg8b : 1;
+ /* cmov and fcmov branchless conditional mov */
+ uint32_t cmov : 1;
+ /* mmx registers/instructions available */
+ uint32_t mmx : 1;
+ /* sse registers/instructions available */
+ uint32_t sse : 1;
+ /* sse2 registers/instructions available */
+ uint32_t sse2 : 1;
+ /* sse3 instructions available */
+ uint32_t sse3 : 1;
+ /* pcmulqdq instruction */
+ uint32_t pclmulqdq : 1;
+ /* ssse3 suplemental sse3 instructions available */
+ uint32_t ssse3 : 1;
+ /* fused multiply/add using ymm state */
+ uint32_t fma : 1;
+ /* cmpxchg16b instruction */
+ uint32_t cmpxchg16b : 1;
+ /* sse4.1 instructions available */
+ uint32_t sse4_1 : 1;
+ /* sse4.2 instructions available */
+ uint32_t sse4_2 : 1;
+ /* movbe instruction available */
+ uint32_t movbe : 1;
+ /* popcnt instruction available */
+ uint32_t popcnt : 1;
+ /* aes instructions available */
+ uint32_t aes : 1;
+ /* avx instructions available */
+ uint32_t avx : 1;
+ /* lahf/sahf available in 64 bits mode */
+ uint32_t lahf : 1;
+} jit_cpu_t;
+
+/*
+ * Initialization
+ */
+JIT_API jit_cpu_t jit_cpu;
+
+#endif /* _jit_x86_h */